Test and research on synchronous operation accuracy of long stroke multi-cylinder (2)

3 signal exchange

Figure 2 is a block diagram of signal transformation and computer detection. The displacement signal outputted by the reading head is a sine wave, and the signal is weak. The detection device conversion circuit should have the following basic signal processing functions according to the actual application requirements: amplification processing of weak signals, subdivision circuit for improving resolution, and discrimination of the grating scale A circuit for reversing the direction of the displacement, a circuit for displaying the real-time observation, and an absolute zero potential for improving system reliability and signal protection. The technical points related to raster signal processing are as follows:

figure 2

Subdivision and pulse formation circuits:

The grating scale has a high scribe line density. For example, the 25 line/mm used in the system requires a higher resolution for detection, and a small pitch is obviously uneconomical in terms of technical difficulty and economy. The use of electronic subdivision technology to improve the resolution is currently the most widely used method, commonly used quadratic frequency, bridge, phase modulation, phase-locked frequency and other subdivision methods. The system adopts the quadruple frequency direct subdivision method, which is a signal with two phase differences of 90° outputted by the grating sensor. After differentiation, four pulse signals with phase difference of 90° are obtained to improve the resolution. For a 25 line/mm grating, a resolution of 10 μm for digital readings can be obtained, which meets the requirements for synchronous accuracy testing.

In the synchronous system operation, the moving direction of the two piston rods of the cylinder changes with respect to the zero position. In order to discriminate the moving direction (the sign of the error), it is necessary to use the output signals of the two phases of the grating sensor with a phase difference of 90°. In the figure, S and C are two-way sine and cosine signals with a phase difference of 90°. When the bone ruler moves in a certain direction, C advances S π/2, and the S signal is pulsed and C-signal generated by the differential circuit. The high level is in the AND gate 1 to obtain the pulse output; and the pulse generated by the inverted signal of S and the low level of the C signal are in the AND gate 2, and the output is low. Similarly, when the slider moves in the opposite direction, S leads C π/2, the gate 2 outputs a pulse, the AND gate 1 outputs a low level, and the pulse signal output from the AND gate 1 or the AND gate 2 controls the addition and subtraction of the counter, respectively. Counting the pulse, the output state of the counter can correctly reflect the moving direction of the grating pair, that is, the two piston rods of the cylinder.

Absolute zero potential function circuit:

During the actual operation of the system, interruption, shutdown, power failure, etc. are inevitable, which will result in lost or erroneous measurement results. Fortunately, most raster designs are equipped with a zero mark to provide a zero point in operation called absolute zero to solve the above problem. To this end, there should be a corresponding absolute zero circuit, that is, a zero pulse forming circuit. In order to adapt to the different frequency doubling requirements of the main grating and to ensure the synchronization of the zero pulse and the counting pulse, the original zero signal of the grating output cannot be directly used as the zero pulse, and the square wave and the original zero signal after the frequency doubling must be properly selected. The square waves are phase-matched, and the waveform having the same frequency doubled width is used as the gate condition, and the count pulse thus taken out is used as the zero pulse signal.

4 computer online detection

The synchronization error signal picked up by the grating sensor is converted into a pulse signal into the counter 8253 after being amplified and shaped, subdivided and judged, etc., the data release register and the shift register in the control logic, and the digital signal is transmitted to the chip 8250 interface circuit. Communicate with the computer through the RS-232 bus to form an automatic detection system for computer synchronization error data. Under the control of the computer program, the synchronization error data is detected, recorded, and recorded in real time, accurately, and automatically for use in data analysis processing. According to the use requirements and test research, the system program has the following basic functions:

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